Bus Design: The latest revision of the ATA specification, ATA/ATAPI-6 where Ultra ATA 100 is defined, maintains backward compatibility with all previous ATA revisions, using the standard 16-bit, wide, parallel data bus and 16 control signals across a 40-pin connector.

Serial ATA: a comparison with Ultra ATA technology. (Serial ATA) by Cavin, Rob / Computer Technology Review

The new 4Gb/s graphics memory, offered in 512Mb density, has a 32-bit data bus configuration.

Samsung Speeds Up World's Fastest Graphics Memory by Business Wire

Also, in order to optimize data transfer between the CPU and MCP, Toshiba has adapted a "triple- data bus system" which consists of a high speed bus (for SDRAM and NOR), a middle speed bus (for SRAM and NOR) and NAND bus.

Toshiba develops Multi-Chip Package (MCP) which realizes stacking of ... by EDP Weekly's IT Monitor

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